Instruction Segment     Last updated on           , a full moon day

Before assembling assembly: ALU, Memory, Register [also see: register map], Clock Cycle, State, and etc. must be analyzed accordance with the most important time. Because, time causes stack such as sequential stack and random stack. After instruction segments have been assembled, ready to compile code AND ready to configure script must be engineered.

Also see: Address; Sample 1;

 

Year 2000 model: 802* frame

 

Year 2000 model: Address mask frame with 16 bit identifier and 16 bit sequence number

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Year 2000 model: ARP packet; Request, Reply, RARP are the same;

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Year 2000 model: Destination unreachable frame;

Type 3 8bit; Code 8bit; Checksum 16bit; Unused 16bit; MTU next hop 16bit; Internet header; 8B datagram;

Type 12 8bit; Code 8bit; Checksum 16bit; Pointer 16bit; Un-used 16bit; Internet header; 8B datagram;

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Year 2000 model: DNS UDP packet; Also see: lmhosts; USA MYANMAR NET still do not understand DNS?

{TRUE} to response, value 1 in qr; {FALSE} to query, value 0 in qr; Value 0 in opcode is standard query, value 1 in opcode is inverse query, value 2 in opcode is server status request; {TRUE} aa is authoritative answer's value TRUE, {FALSE} aa is authoritative answer's value FALSE; {TRUE} tc is truncate value TRUE, {FALSE} tc is truncate value FALSE; {TRUE} rd is recursion desire's value TRUE, {FALSE} rd is recursion desire's value FALSE; {TRUE} ra is recursion available's value TRUE, {FALSE} ra is recursion available's value FALSE; Value 0 in rcode is no error, value 3 in rcode is name error; questions' value 0 is reply, questions' value => 1 is query; answersRR's value 0 query, answersRR's value => 1 is reply;

 

Year 2000 model: Echo request frame echo reply frame

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Year 2000 model: Ethernet frame

 

Year 2000 model: IP datagram, MAX IP packet size is 165535 B; 232 - 1;

 

Year 2000 model: PPP frame

 

 

Year 2000 model: Redirect frame

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Year 2000 model: Source quench frame

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Year 2000 model: Time exceeded frame

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Year 2000 model: Time stamp request frame time stamp reply frame

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For processor independent OS engineers and scientists only: Analyze each processor, functionalities, complexity regions, and then test each instruction segment;

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